75 lines
2.1 KiB
C++
75 lines
2.1 KiB
C++
#include "CH32V20xxx.h"
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typedef __SIZE_TYPE__ size_t;
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extern "C" {
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// These magic symbols are provided by the linker.
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extern uint32_t _sbss;
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extern uint32_t _ebss;
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extern uint32_t _data_lma;
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extern uint32_t _data_vma;
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extern uint32_t _edata;
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[[gnu::weak]] extern void (*__preinit_array_start[]) (void);
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[[gnu::weak]] extern void (*__preinit_array_end[]) (void);
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[[gnu::weak]] extern void (*__init_array_start[]) (void);
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[[gnu::weak]] extern void (*__init_array_end[]) (void);
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[[gnu::used]] extern void SystemInit ();
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};
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static void init_variables () {
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uint32_t * dst, * end;
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/* Zero fill the bss section */
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dst = &_sbss;
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end = &_ebss;
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while (dst < end) * dst++ = 0U;
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/* Copy data section from flash to RAM */
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uint32_t * src;
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src = &_data_lma;
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dst = &_data_vma;
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end = &_edata;
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if (src != dst) {
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while (dst < end) * dst++ = * src++;
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}
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}
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static void call_constructors () {
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size_t count;
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/* Pro Cortex-Mx bylo toto zbytečné, lze předpokládat, že je to tak i zde.
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count = __preinit_array_end - __preinit_array_start;
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for (unsigned i = 0; i < count; i++) __preinit_array_start[i]();
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*/
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count = __init_array_end - __init_array_start;
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for (unsigned i = 0; i < count; i++) __init_array_start[i]();
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}
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enum CLKSRC : uint32_t {
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CLK_HSI = 0u,
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CLK_HSE,
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CLK_PLL,
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};
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// HSE i HSI mají frekvenci 8 MHz
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void SystemInit(void) {
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init_variables();
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/// TODO
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EXTEND.EXTEND_CTR.B.PLL_HSI_PRE = SET; // HSI used for PLL, not divided
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RCC.CFGR0.modify([](RCC_Type::CFGR0_DEF & r) -> uint32_t {
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r.B.PLLMUL = 0xFu; // 8x18 = 144
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r.B.PPRE1 = 4u; // 100: HCLK divided by 2 (PB1)
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return r.R; // HB, PB2 not divided
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});
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RCC.CTLR.modify([](RCC_Type::CTLR_DEF & r) -> uint32_t {
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r.B.HSITRIM = 0x10u;
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r.B.HSION = SET;
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//r.B.HSEBYP = SET;
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r.B.CSSON = SET; // Enable clock security system
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r.B.PLLON = SET;
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return r.R;
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});
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RCC.INTR.R = 0x009F0000u; // clear interrupts
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while (RCC.CTLR.B.PLLRDY == RESET);
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// USE PLL
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RCC.CFGR0.B.SW = CLK_PLL ;
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while (RCC.CFGR0.B.SWS != CLK_PLL);
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call_constructors();
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}
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