232 lines
7.8 KiB
C++
232 lines
7.8 KiB
C++
#include "STM32F0x1.h"
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#include "system.h"
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal High Speed oscillator in Hz. */
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#endif /* HSI_VALUE */
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#define HSE_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSE start up */
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//! [EnumExampleSW_EN_Def]
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typedef enum {
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USEHSI = 0, USEHSE, USEPLL
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} SW_EN;
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//! [EnumExampleSW_EN_Def]
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typedef enum {
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RCC_CFGR_PLLMUL2 = 0,
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RCC_CFGR_PLLMUL3,
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RCC_CFGR_PLLMUL4,
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RCC_CFGR_PLLMUL5,
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RCC_CFGR_PLLMUL6,
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RCC_CFGR_PLLMUL7,
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RCC_CFGR_PLLMUL8,
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RCC_CFGR_PLLMUL9,
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RCC_CFGR_PLLMUL10,
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RCC_CFGR_PLLMUL11,
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RCC_CFGR_PLLMUL12,
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RCC_CFGR_PLLMUL13,
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RCC_CFGR_PLLMUL14,
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RCC_CFGR_PLLMUL15,
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RCC_CFGR_PLLMUL16,
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} PLLML_EN;
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/* Select the PLL clock source */
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//#define PLL_SOURCE_HSI // HSI (~8MHz) used to clock the PLL, and the PLL is used as system clock source
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#define PLL_SOURCE_HSE // HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source
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//#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock
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// the PLL, and the PLL is used as system clock source
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uint32_t SystemCoreClock = 48000000;
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const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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static void SetSysClock (void);
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/**
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* @brief Setup the microcontroller system.
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* Initialize the Embedded Flash Interface, the PLL and update the
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* SystemCoreClock variable.
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* @param None
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* @retval None
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*/
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extern "C"
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void SystemInit (void) {
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/* Set HSION bit */
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RCC.CR.R |= (uint32_t) 0x00000001;
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/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
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RCC.CFGR.R &= (uint32_t) 0xF8FFB80C;
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/* Reset HSEON, CSSON and PLLON bits */
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RCC.CR.R &= (uint32_t) 0xFEF6FFFF;
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/* Reset HSEBYP bit */
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RCC.CR.R &= (uint32_t) 0xFFFBFFFF;
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/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
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RCC.CFGR.R &= (uint32_t) 0xFFC0FFFF;
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/* Reset PREDIV1[3:0] bits */
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RCC.CFGR2.R &= (uint32_t) 0xFFFFFFF0;
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/* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
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RCC.CFGR3.R &= (uint32_t) 0xFFFFFEAC;
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/* Reset HSI14 bit */
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RCC.CR2.R &= (uint32_t) 0xFFFFFFFE;
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/* Disable all interrupts */
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RCC.CIR.R = 0x00000000u;
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/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
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SetSysClock();
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}
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/**
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* @brief Update SystemCoreClock according to Clock Register Values
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* The SystemCoreClock variable contains the core clock (HCLK), it can
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* be used by the user application to setup the SysTick timer or configure
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* other parameters.
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*
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* @note Each time the core clock (HCLK) changes, this function must be called
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* to update SystemCoreClock variable value. Otherwise, any configuration
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* based on this variable will be incorrect.
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*
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* @note - The system frequency computed by this function is not the real
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* frequency in the chip. It is calculated based on the predefined
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* constant and the selected clock source:
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*
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* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
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*
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* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
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*
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* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
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* or HSI_VALUE(*) multiplied/divided by the PLL factors.
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*
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* (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value
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* 8 MHz) but the real value may vary depending on the variations
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* in voltage and temperature.
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*
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* (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value
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* 8 MHz), user has to ensure that HSE_VALUE is same as the real
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* frequency of the crystal used. Otherwise, this function may
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* have wrong result.
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*
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* - The result of this function could be not correct when using fractional
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* value for HSE crystal.
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* @param None
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* @retval None
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*/
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extern "C"
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void SystemCoreClockUpdate (void) {
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uint32_t prediv1factor, pllmull;
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//! [EnumExampleSW_EN_Use]
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switch (RCC.CFGR.B.SWS) {
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case USEHSI: /* HSI used as system clock */
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SystemCoreClock = HSI_VALUE;
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break;
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case USEHSE: /* HSE used as system clock */
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SystemCoreClock = HSE_VALUE;
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break;
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case USEPLL: /* PLL used as system clock */
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/* Get PLL clock source and multiplication factor */
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pllmull = RCC.CFGR.B.PLLMUL + 2u;
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// ...
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//! [EnumExampleSW_EN_Use]
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if (RCC.CFGR.B.PLLSRC == RESET) {
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/* HSI oscillator clock divided by 2 selected as PLL clock entry */
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SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
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} else {
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prediv1factor = RCC.CFGR2.B.PREDIV + 1;
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/* HSE oscillator clock selected as PREDIV1 clock entry */
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SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
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}
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break;
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default: /* HSI used as system clock */
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SystemCoreClock = HSI_VALUE;
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break;
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}
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/* Compute HCLK clock frequency */
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/* Get HCLK prescaler */
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pllmull = AHBPrescTable[RCC.CFGR.B.HPRE];
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/* HCLK clock frequency */
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SystemCoreClock >>= pllmull;
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}
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/**
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* @brief Configures the System clock frequency, AHB/APBx prescalers and Flash
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* settings.
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* @note This function should be called only once the RCC clock configuration
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* is reset to the default reset state (done in SystemInit() function).
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* @param None
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* @retval None
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*/
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static void SetSysClock (void) {
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/* SYSCLK, HCLK, PCLK configuration */
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#if defined (PLL_SOURCE_HSI)
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/* At this stage the HSI is already enabled */
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/* Enable Prefetch Buffer and set Flash Latency */
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Flash.ACR.setbit([] (auto & r) -> auto { // C++14
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r.B.PRFTBE = SET;
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r.B.LATENCY = SET;
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return r.R;
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});
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RCC.CFGR.modify([] (auto & r) -> auto {
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r.B.HPRE = 0;
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r.B.PPRE = 0;
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r.B.PLLSRC = RESET;
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r.B.PLLXTPRE = RESET;
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r.B.PLLMUL = RCC_CFGR_PLLMUL12;
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return r.R;
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});
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/* Enable PLL */
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RCC.CR.B.PLLON = SET;
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/* Wait till PLL is ready */
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while ((RCC.CR.B.PLLRDY) == RESET);
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/* Select PLL as system clock source */
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RCC.CFGR.B.SW = USEPLL;
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/* Wait till PLL is used as system clock source */
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while (RCC.CFGR.B.SWS != USEPLL);
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#else
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#if defined (PLL_SOURCE_HSE)
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/* Enable HSE */
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RCC.CR.B.HSEON = SET;
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#elif defined (PLL_SOURCE_HSE_BYPASS)
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/* HSE oscillator bypassed with external clock */
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RCC.CR.B.HSEON = SET;
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RCC.CR.B.HSEBYP = SET;
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#endif /* PLL_SOURCE_HSE */
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__IO uint32_t StartUpCounter = 0;
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__IO uint32_t HSEStatus;
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/* Wait till HSE is ready and if Time out is reached exit */
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do {
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HSEStatus = RCC.CR.B.HSERDY;
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StartUpCounter++;
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} while ((HSEStatus == RESET) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
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HSEStatus = RCC.CR.B.HSERDY;
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if (HSEStatus == SET) {
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/* Enable Prefetch Buffer and set Flash Latency */
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Flash.ACR.setbit([] (auto & r) -> uint32_t {
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r.B.PRFTBE = SET;
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r.B.LATENCY = SET;
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return r.R;
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});
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RCC.CFGR.modify([] (auto & r) -> uint32_t {
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r.B.HPRE = 0;
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r.B.PPRE = 0;
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r.B.PLLSRC = SET;
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r.B.PLLXTPRE = RESET;
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r.B.PLLMUL = RCC_CFGR_PLLMUL12;
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return r.R;
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});
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/* Enable PLL */
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RCC.CR.B.PLLON = SET;
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/* Wait till PLL is ready */
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while ((RCC.CR.B.PLLRDY) == RESET);
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/* Select PLL as system clock source */
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RCC.CFGR.B.SW = USEPLL;
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/* Wait till PLL is used as system clock source */
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while (RCC.CFGR.B.SWS != USEPLL);
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} else {
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/* If HSE fails to start-up, the application will have wrong clock
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configuration. User can add here some code to deal with this error */
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}
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#endif /* PLL_SOURCE_HSI */
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}
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