320 lines
10 KiB
C
320 lines
10 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : core_riscv.h
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* Author : WCH
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* Version : V1.0.1
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* Date : 2023/11/11
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* Description : RISC-V V4 Core Peripheral Access Layer Header File for CH32V20x
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CORE_RISCV_H__
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#define __CORE_RISCV_H__
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* IO definitions */
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#ifdef __cplusplus
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#define __I volatile /* defines 'read only' permissions */
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#else
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#define __I volatile const /* defines 'read only' permissions */
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#endif
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#define __O volatile /* defines 'write only' permissions */
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#define __IO volatile /* defines 'read / write' permissions */
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/* Standard Peripheral Library old types (maintained for legacy purpose) */
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typedef __I uint64_t vuc64; /* Read Only */
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typedef __I uint32_t vuc32; /* Read Only */
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typedef __I uint16_t vuc16; /* Read Only */
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typedef __I uint8_t vuc8; /* Read Only */
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typedef const uint64_t uc64; /* Read Only */
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typedef const uint32_t uc32; /* Read Only */
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typedef const uint16_t uc16; /* Read Only */
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typedef const uint8_t uc8; /* Read Only */
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typedef __I int64_t vsc64; /* Read Only */
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typedef __I int32_t vsc32; /* Read Only */
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typedef __I int16_t vsc16; /* Read Only */
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typedef __I int8_t vsc8; /* Read Only */
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typedef const int64_t sc64; /* Read Only */
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typedef const int32_t sc32; /* Read Only */
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typedef const int16_t sc16; /* Read Only */
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typedef const int8_t sc8; /* Read Only */
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typedef __IO uint64_t vu64;
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typedef __IO uint32_t vu32;
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typedef __IO uint16_t vu16;
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typedef __IO uint8_t vu8;
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typedef uint64_t u64;
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typedef uint32_t u32;
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typedef uint16_t u16;
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typedef uint8_t u8;
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typedef __IO int64_t vs64;
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typedef __IO int32_t vs32;
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typedef __IO int16_t vs16;
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typedef __IO int8_t vs8;
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typedef int64_t s64;
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typedef int32_t s32;
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typedef int16_t s16;
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typedef int8_t s8;
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#define RV_STATIC_INLINE static inline
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typedef enum {NoREADY = 0, READY = !NoREADY} ErrorStatus;
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typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
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/*********************************************************************
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* @fn __enable_irq
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*
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* @brief Enable Global Interrupt
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*
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* @return none
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __enable_irq()
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{
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__asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
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}
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/*********************************************************************
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* @fn __disable_irq
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*
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* @brief Disable Global Interrupt
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*
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* @return none
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __disable_irq()
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{
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__asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
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}
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/*********************************************************************
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* @fn __NOP
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*
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* @brief nop
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*
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* @return none
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE void __NOP()
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{
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__asm volatile ("nop");
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}
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/*********************************************************************
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* @fn __AMOADD_W
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*
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* @brief Atomic Add with 32bit value
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* Atomically ADD 32bit value with value in memory using amoadd.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ADDed
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*
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* @return return memory value + add value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOADD_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoadd.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOAND_W
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*
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* @brief Atomic And with 32bit value
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* Atomically AND 32bit value with value in memory using amoand.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ANDed
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*
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* @return return memory value & and value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOAND_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoand.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMAX_W
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*
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* @brief Atomic signed MAX with 32bit value
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* Atomically signed max compare 32bit value with value in memory using amomax.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return the bigger value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOMAX_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amomax.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMAXU_W
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*
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* @brief Atomic unsigned MAX with 32bit value
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* Atomically unsigned max compare 32bit value with value in memory using amomaxu.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return return the bigger value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t __AMOMAXU_W(volatile uint32_t *addr, uint32_t value)
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{
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uint32_t result;
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__asm volatile ("amomaxu.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMIN_W
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*
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* @brief Atomic signed MIN with 32bit value
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* Atomically signed min compare 32bit value with value in memory using amomin.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return the smaller value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOMIN_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amomin.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOMINU_W
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*
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* @brief Atomic unsigned MIN with 32bit value
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* Atomically unsigned min compare 32bit value with value in memory using amominu.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be compared
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*
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* @return the smaller value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t __AMOMINU_W(volatile uint32_t *addr, uint32_t value)
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{
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uint32_t result;
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__asm volatile ("amominu.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOOR_W
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*
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* @brief Atomic OR with 32bit value
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* Atomically OR 32bit value with value in memory using amoor.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be ORed
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*
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* @return return memory value | and value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOOR_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoor.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/*********************************************************************
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* @fn __AMOSWAP_W
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*
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* @brief Atomically swap new 32bit value into memory using amoswap.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* newval - New value to be stored into the address
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*
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* @return return the original value in memory
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE uint32_t __AMOSWAP_W(volatile uint32_t *addr, uint32_t newval)
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{
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uint32_t result;
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__asm volatile ("amoswap.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(newval) : "memory");
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return result;
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}
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/*********************************************************************
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* @fn __AMOXOR_W
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*
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* @brief Atomic XOR with 32bit value
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* Atomically XOR 32bit value with value in memory using amoxor.d.
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*
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* @param addr - Address pointer to data, address need to be 4byte aligned
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* value - value to be XORed
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*
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* @return return memory value ^ and value
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*/
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__attribute__( ( always_inline ) ) RV_STATIC_INLINE int32_t __AMOXOR_W(volatile int32_t *addr, int32_t value)
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{
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int32_t result;
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__asm volatile ("amoxor.w %0, %2, %1" : \
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"=r"(result), "+A"(*addr) : "r"(value) : "memory");
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return *addr;
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}
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/* Core_Exported_Functions */
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extern uint32_t __get_MSTATUS(void);
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extern void __set_MSTATUS(uint32_t value);
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extern uint32_t __get_MISA(void);
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extern void __set_MISA(uint32_t value);
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extern uint32_t __get_MTVEC(void);
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extern void __set_MTVEC(uint32_t value);
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extern uint32_t __get_MSCRATCH(void);
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extern void __set_MSCRATCH(uint32_t value);
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extern uint32_t __get_MEPC(void);
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extern void __set_MEPC(uint32_t value);
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extern uint32_t __get_MCAUSE(void);
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extern void __set_MCAUSE(uint32_t value);
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extern uint32_t __get_MTVAL(void);
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extern void __set_MTVAL(uint32_t value);
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extern uint32_t __get_MVENDORID(void);
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extern uint32_t __get_MARCHID(void);
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extern uint32_t __get_MIMPID(void);
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extern uint32_t __get_MHARTID(void);
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extern uint32_t __get_SP(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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