RISC-V/V203/ch32v203/system.cpp
2024-05-07 11:46:49 +02:00

31 lines
886 B
C++

#include "CH32V20xxx.h"
extern "C" void SystemInit ();
enum CLKSRC : uint32_t {
CLK_HSI = 0u,
CLK_HSE,
CLK_PLL,
};
// HSE i HSI mají frekvenci 8 MHz
void SystemInit(void) {
/// TODO
EXTEND.EXTEND_CTR.B.PLL_HSI_PRE = SET; // HSI used for PLL, not divided
RCC.CFGR0.modify([](RCC_Type::CFGR0_DEF & r) -> uint32_t {
r.B.PLLMUL = 0xFu; // 8x18 = 144
r.B.PPRE1 = 4u; // 100: HCLK divided by 2 (PB1)
return r.R; // HB, PB2 not divided
});
RCC.CTLR.modify([](RCC_Type::CTLR_DEF & r) -> uint32_t {
r.B.HSITRIM = 0x10u;
r.B.HSION = SET;
//r.B.HSEBYP = SET;
r.B.CSSON = SET; // Enable clock security system
r.B.PLLON = SET;
return r.R;
});
RCC.INTR.R = 0x009F0000u; // clear interrupts
while (RCC.CTLR.B.PLLRDY == RESET);
// USE PLL
RCC.CFGR0.B.SW = CLK_PLL ;
while (RCC.CFGR0.B.SWS != CLK_PLL);
}