--- doc/CH32V00xxx.h	2024-03-02 19:53:18.131160595 +0100
+++ ch32v003/CH32V00xxx.h	2024-03-02 17:47:01.917279776 +0100
@@ -2701,6 +2701,7 @@
     } B;
     __IO uint32_t  R;
     explicit STATR_DEF () noexcept { R = 0x000000c0u; }
+    explicit STATR_DEF (volatile STATR_DEF & o) noexcept { R = o.R; };
     template<typename F> void setbit (F f) volatile {
       STATR_DEF r;
       R = f (r);
@@ -4142,18 +4143,15 @@
 static_assert (sizeof(struct EXTEND_Type) == 8, "size error EXTEND");
 static_assert (sizeof(struct DBG_Type) == 8, "size error DBG");
 static_assert (sizeof(struct PFIC_Type) == 4116, "size error PFIC");
-
+#if 1
 /* Interrupts : conflicts cmsis part - use copy / paste */
 enum IRQn {
-  NonMaskableInt_IRQn   = -14, //!< 2 Non Maskable Interrupt
-  HardFault_IRQn        = -13, //!< 3 HardFault
-  MemoryManagement_IRQn = -12, //!< 4 Cortex-M4 Memory Management Interrupt
-  BusFault_IRQn         = -11, //!< 5 Cortex-M4 Bus Fault Interrupt
-  UsageFault_IRQn       = -10, //!< 6 Cortex-M4 Usage Fault Interrupt
-  SVCall_IRQn           =  -5, //!< 11 Cortex-Mx SV Call Interrupt
-  DebugMonitor_IRQn     =  -4, //!< 12 Cortex-M4 Debug Monitor Interrupt
-  PendSV_IRQn           =  -2, //!< 14 Cortex-Mx Pend SV Interrupt
-  SysTick_IRQn          =  -1, //!< 15 Cortex-Mx System Tick Interrupt
+  /******  RISC-V Processor Exceptions Numbers *************************************/
+  NonMaskableInt_IRQn = 2, /* 2 Non Maskable Interrupt                             */
+  EXC_IRQn = 3,            /* 3 Exception Interrupt                                */
+  SysTicK_IRQn = 12,       /* 12 System timer Interrupt                            */
+  Software_IRQn = 14,      /* 14 software Interrupt                                */
+  
   WWDG_IRQn             =  16, //!< Window Watchdog interrupt
   PVD_IRQn              =  17, //!< PVD through EXTI line detection interrupt
   FLASH_IRQn            =  18, //!< Flash global interrupt
@@ -4179,3 +4177,4 @@
   TIM2_IRQn             =  38, //!< TIM2 global interrupt
 };
 #endif
+#endif