#ifndef STRUCTURES_DEFINE_H #define STRUCTURES_DEFINE_H #include enum ADC_CHANNELS : uint16_t { V1_VSENSE = 0, V2_VSENSE, ADC_MAXCHANNELS, // interní konstanta - počet kanálů }; typedef uint16_t SAMPLE; union DATA_BLOCK { SAMPLE channels [ADC_MAXCHANNELS]; uint32_t common_data; }; enum TRIGER_MODE : uint16_t { TRIGER_MODE_AUTO = 0, TRIGER_MODE_NORMAL, TRIGER_MODE_SINGLE }; struct TrigerSettings { uint16_t value; uint16_t offset; TRIGER_MODE mode; ADC_CHANNELS channel; bool rising; explicit TrigerSettings () noexcept : value(0x80u), offset(100u), mode(TRIGER_MODE_AUTO), channel(V1_VSENSE), rising(false) {} }; static_assert (sizeof(TrigerSettings) == 10, "TrigerSettings error"); union AllSettings { struct _x { TrigerSettings trg; uint16_t tim; } part; uint8_t common [sizeof (_x)]; explicit AllSettings (const TrigerSettings & ts, const unsigned n) noexcept { part.trg.value = ts.value; part.trg.offset = ts.offset; part.trg.mode = ts.mode; part.trg.channel = ts.channel; part.trg.rising = ts.rising; part.tim = n; } }; static_assert (sizeof(AllSettings) == 12, "TrigerSettings error"); union SendHeader { struct s_bits { uint16_t pack_len : 15; uint16_t trig_flg : 1; } bits; uint16_t common; }; static_assert (sizeof(SendHeader) == 2, "SendHeader error"); enum DESTINATION { DEST_CHA = 0, DEST_CHB, DEST_TRIG, DEST_BASE, }; enum TRIGGER_CMD { TRIGGER_CMD_MODE = 0, TRIGGER_CMD_VALUE, TRIGGER_CMD_OFSET, }; union TriggerModeUnion { struct s_bits { uint16_t mode : 2; uint16_t channel : 1; uint16_t rissing : 1; uint16_t unused : 12; } bits; uint16_t common; }; static_assert (sizeof(TriggerModeUnion) == 2, "TriggerModeUnion error"); union RcvdHeader { struct s_bits { uint16_t cmd_value : 12; uint16_t cmd_type : 2; uint16_t destinat : 2; } bits; uint16_t common; }; static_assert (sizeof(RcvdHeader) == 2, "RcvdHeader error"); enum MOVE_ITEMS { MOVE_VALUE = 0, MOVE_OFSET, MOVE_MARKERA, MOVE_MARKERB, TIME_ZOOM, }; enum TIME_BASE_MODE { TIME_BASE_TRIGERED = 0, TIME_BASE_CONTINUOUS, }; struct TimeBaseDescriptor { uint16_t divider; uint16_t presc; TIME_BASE_MODE mode; }; #endif // STRUCTURES_DEFINE_H