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3 commits

Author SHA1 Message Date
Kizarm
4ec412bf43 baud zero divide 2024-10-18 19:45:45 +02:00
Kizarm
47dd58d040 reorder constructors call 2024-10-18 19:26:45 +02:00
Kizarm
e8378e832a set system clock to 144MHz 2024-10-18 14:32:41 +02:00
4 changed files with 43 additions and 44 deletions

View file

@ -1,9 +1,9 @@
#include "system.h"
typedef __SIZE_TYPE__ size_t;
extern "C" {
extern void handle_reset () __attribute__((naked,nothrow,used));
extern void user_init () __attribute__((used));
extern int main () __attribute__((used));
[[using gnu: naked,nothrow,used]] extern void handle_reset ();
[[gnu::used]] extern void user_init ();
[[gnu::used]] extern int main ();
// This is required to allow pure virtual functions to be defined.
extern void __cxa_pure_virtual() { while (1); }
@ -14,41 +14,17 @@ extern "C" {
extern uint32_t _data_vma;
extern uint32_t _edata;
extern void (*__preinit_array_start[]) (void) __attribute__((weak));
extern void (*__preinit_array_end[]) (void) __attribute__((weak));
extern void (*__init_array_start[]) (void) __attribute__((weak));
extern void (*__init_array_end[]) (void) __attribute__((weak));
[[gnu::weak]] extern void (*__preinit_array_start[]) (void);
[[gnu::weak]] extern void (*__preinit_array_end[]) (void);
[[gnu::weak]] extern void (*__init_array_start[]) (void);
[[gnu::weak]] extern void (*__init_array_end[]) (void);
static void __init_array () {
uint32_t * dst, * end;
/* Zero fill the bss section */
dst = &_sbss;
end = &_ebss;
while (dst < end) * dst++ = 0U;
/* Copy data section from flash to RAM */
uint32_t * src;
src = &_data_lma;
dst = &_data_vma;
end = &_edata;
if (src != dst) {
while (dst < end) * dst++ = * src++;
}
size_t count;
/* Pro Cortex-Mx bylo toto zbytečné, lze předpokládat, že je to tak i zde.
count = __preinit_array_end - __preinit_array_start;
for (unsigned i = 0; i < count; i++) __preinit_array_start[i]();
*/
count = __init_array_end - __init_array_start;
for (unsigned i = 0; i < count; i++) __init_array_start[i]();
}
// If you don't override a specific handler, it will just spin forever.
void DefaultIRQHandler( void ) {
[[gnu::interrupt]] void DefaultIRQHandler( void ) {
// Infinite Loop
for (;;);
}
void NMI_RCC_CSS_IRQHandler( void ) {
[[gnu::interrupt]] void NMI_RCC_CSS_IRQHandler( void ) {
RCC.INTR.B.CSSC = RESET; // clear the clock security int flag
}
#define ALIAS(f) __attribute__((nothrow,weak,alias(#f),used))
@ -255,10 +231,35 @@ R"---(
: : [main]"r"(user_init)/*, [InterruptVector]"r"(InterruptVector)*/
: "t0", "memory" );
}
static void init_variables () {
uint32_t * dst, * end;
/* Zero fill the bss section */
dst = &_sbss;
end = &_ebss;
while (dst < end) * dst++ = 0U;
/* Copy data section from flash to RAM */
uint32_t * src;
src = &_data_lma;
dst = &_data_vma;
end = &_edata;
if (src != dst) {
while (dst < end) * dst++ = * src++;
}
}
static void init_constructors () {
/* Pro Cortex-Mx bylo toto zbytečné, lze předpokládat, že je to tak i zde.
count = __preinit_array_end - __preinit_array_start;
for (unsigned i = 0; i < count; i++) __preinit_array_start[i]();
*/
const size_t count = __init_array_end - __init_array_start;
for (unsigned i = 0; i < count; i++) __init_array_start[i]();
}
void user_init () {
init_variables();
SystemInit();
SystemCoreClockUpdate();
__init_array();
init_constructors(); // Konstruktory zavolat až po inicializaci hodin
main ();
for (;;);
}

View file

@ -10,14 +10,13 @@ enum CLKSRC : uint32_t {
static constexpr unsigned HSI_VALUE = 8000000u; /* Value of the Internal oscillator in Hz */
static constexpr unsigned HSE_VALUE = 8000000u; /* Value of the External oscillator in Hz */
/* In the following line adjust the External High Speed oscillator (HSE) Startup Timeout value */
static constexpr unsigned SYSCLK_FREQ_96MHz_HSE = SYSTEM_CORE_CLOCK;
static constexpr unsigned HSE_STARTUP_TIMEOUT = 0x1000u; /* Time out for HSE start up */
// HSE i HSI mají frekvenci 8 MHz
static constexpr uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSE; /* System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SYSTEM_CORE_CLOCK; /* System Clock Frequency (Core Clock) */
static void SetSysClockTo96_HSE(void) {
static void SetSysClock_HSE(void) {
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC.CTLR.B.HSEON = SET;
@ -45,7 +44,7 @@ static void SetSysClockTo96_HSE(void) {
*/
r.B.PLLSRC = SET;
r.B.PLLXTPRE = RESET;
r.B.PLLMUL = 10u;
r.B.PLLMUL = 15u; // or 10u for 96 MHz
return r.R;
});
/* Enable PLL */
@ -71,7 +70,7 @@ void SystemInit(void) {
RCC.CTLR.R &= 0xFFFBFFFFu;
RCC.CFGR0.R &= 0xFF00FFFFu;
RCC.INTR.R = 0x009F0000u;
SetSysClockTo96_HSE();
SetSysClock_HSE();
}
/*********************************************************************
* @fn SystemCoreClockUpdate
@ -81,7 +80,7 @@ void SystemInit(void) {
* @return none
*/
void SystemCoreClockUpdate (void) {
uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0;
uint32_t tmp = 0, pllmull = 0, pllsource = 0;
tmp = RCC.CFGR0.B.SWS;
@ -112,9 +111,6 @@ void SystemCoreClockUpdate (void) {
SystemCoreClock = HSE_VALUE * pllmull;
}
}
if(Pll_6_5 == 1) SystemCoreClock = (SystemCoreClock / 2);
break;
default:
SystemCoreClock = HSI_VALUE;
@ -128,6 +124,7 @@ void SystemCoreClockUpdate (void) {
static uint32_t p_us = 0u;
static bool timeout;
void delay_init () {
// default clock is HCLK / 8
p_us = SystemCoreClock / 8000000;
}
void delay_us (const unsigned dly) {

View file

@ -79,7 +79,7 @@ struct SysTick_Type {
}
};
static SysTick_Type & SysTick = * reinterpret_cast<SysTick_Type * const> (0xE000F000);
static constexpr unsigned SYSTEM_CORE_CLOCK = 96'000'000u;
static constexpr unsigned SYSTEM_CORE_CLOCK = 144'000'000u; // or 96'000'000u
extern "C" {
extern uint32_t SystemCoreClock;
extern void SystemCoreClockUpdate (void);

View file

@ -69,6 +69,7 @@ uint32_t Usart::Down(const char * data, const uint32_t len) {
return n;
}
void Usart::SetBaud (const uint32_t _baud) const {
if (_baud == 0u) return; // ! zero divide
const ONE_BIT b = USART1.CTLR1.B.UE;
if (b == SET) USART1.CTLR1.B.UE = RESET;
const uint32_t HCLK = SystemCoreClock; // hodiny pro USART zde nejsou děleny