set system clock to 144MHz

This commit is contained in:
Kizarm 2024-10-18 14:32:41 +02:00
parent 9140ee66f9
commit e8378e832a
2 changed files with 7 additions and 10 deletions

View file

@ -10,14 +10,13 @@ enum CLKSRC : uint32_t {
static constexpr unsigned HSI_VALUE = 8000000u; /* Value of the Internal oscillator in Hz */ static constexpr unsigned HSI_VALUE = 8000000u; /* Value of the Internal oscillator in Hz */
static constexpr unsigned HSE_VALUE = 8000000u; /* Value of the External oscillator in Hz */ static constexpr unsigned HSE_VALUE = 8000000u; /* Value of the External oscillator in Hz */
/* In the following line adjust the External High Speed oscillator (HSE) Startup Timeout value */ /* In the following line adjust the External High Speed oscillator (HSE) Startup Timeout value */
static constexpr unsigned SYSCLK_FREQ_96MHz_HSE = SYSTEM_CORE_CLOCK;
static constexpr unsigned HSE_STARTUP_TIMEOUT = 0x1000u; /* Time out for HSE start up */ static constexpr unsigned HSE_STARTUP_TIMEOUT = 0x1000u; /* Time out for HSE start up */
// HSE i HSI mají frekvenci 8 MHz // HSE i HSI mají frekvenci 8 MHz
static constexpr uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; static constexpr uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
uint32_t SystemCoreClock = SYSCLK_FREQ_96MHz_HSE; /* System Clock Frequency (Core Clock) */ uint32_t SystemCoreClock = SYSTEM_CORE_CLOCK; /* System Clock Frequency (Core Clock) */
static void SetSysClockTo96_HSE(void) { static void SetSysClock_HSE(void) {
__IO uint32_t StartUpCounter = 0, HSEStatus = 0; __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
RCC.CTLR.B.HSEON = SET; RCC.CTLR.B.HSEON = SET;
@ -45,7 +44,7 @@ static void SetSysClockTo96_HSE(void) {
*/ */
r.B.PLLSRC = SET; r.B.PLLSRC = SET;
r.B.PLLXTPRE = RESET; r.B.PLLXTPRE = RESET;
r.B.PLLMUL = 10u; r.B.PLLMUL = 15u; // or 10u for 96 MHz
return r.R; return r.R;
}); });
/* Enable PLL */ /* Enable PLL */
@ -71,7 +70,7 @@ void SystemInit(void) {
RCC.CTLR.R &= 0xFFFBFFFFu; RCC.CTLR.R &= 0xFFFBFFFFu;
RCC.CFGR0.R &= 0xFF00FFFFu; RCC.CFGR0.R &= 0xFF00FFFFu;
RCC.INTR.R = 0x009F0000u; RCC.INTR.R = 0x009F0000u;
SetSysClockTo96_HSE(); SetSysClock_HSE();
} }
/********************************************************************* /*********************************************************************
* @fn SystemCoreClockUpdate * @fn SystemCoreClockUpdate
@ -81,7 +80,7 @@ void SystemInit(void) {
* @return none * @return none
*/ */
void SystemCoreClockUpdate (void) { void SystemCoreClockUpdate (void) {
uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0; uint32_t tmp = 0, pllmull = 0, pllsource = 0;
tmp = RCC.CFGR0.B.SWS; tmp = RCC.CFGR0.B.SWS;
@ -112,9 +111,6 @@ void SystemCoreClockUpdate (void) {
SystemCoreClock = HSE_VALUE * pllmull; SystemCoreClock = HSE_VALUE * pllmull;
} }
} }
if(Pll_6_5 == 1) SystemCoreClock = (SystemCoreClock / 2);
break; break;
default: default:
SystemCoreClock = HSI_VALUE; SystemCoreClock = HSI_VALUE;
@ -128,6 +124,7 @@ void SystemCoreClockUpdate (void) {
static uint32_t p_us = 0u; static uint32_t p_us = 0u;
static bool timeout; static bool timeout;
void delay_init () { void delay_init () {
// default clock is HCLK / 8
p_us = SystemCoreClock / 8000000; p_us = SystemCoreClock / 8000000;
} }
void delay_us (const unsigned dly) { void delay_us (const unsigned dly) {

View file

@ -79,7 +79,7 @@ struct SysTick_Type {
} }
}; };
static SysTick_Type & SysTick = * reinterpret_cast<SysTick_Type * const> (0xE000F000); static SysTick_Type & SysTick = * reinterpret_cast<SysTick_Type * const> (0xE000F000);
static constexpr unsigned SYSTEM_CORE_CLOCK = 96'000'000u; static constexpr unsigned SYSTEM_CORE_CLOCK = 144'000'000u; // or 96'000'000u
extern "C" { extern "C" {
extern uint32_t SystemCoreClock; extern uint32_t SystemCoreClock;
extern void SystemCoreClockUpdate (void); extern void SystemCoreClockUpdate (void);