change spi to soft
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parent
66285cf2a3
commit
b12b9b92af
7 changed files with 52 additions and 10 deletions
1
.gitignore
vendored
1
.gitignore
vendored
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@ -24,4 +24,5 @@ V203/usb/scope/software/moc/*
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V203/usb/scope/software/obj/*
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V203/usb/scope/software/qrc_src.cpp
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V203/usb/scope/software/ui_mainwindow.h
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V203/usb/spitest/*
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@ -82,14 +82,14 @@ void SpiClass::Init() {
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return r.R;
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});
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SPI1.CTLR1.modify([](SPI1_Type::CTLR1_DEF & r) -> uint32_t {
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r.B.CPHA = SET;
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r.B.CPOL = SET;
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r.B.CPHA = RESET;
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r.B.CPOL = RESET;
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r.B.MSTR = SET;
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r.B.DFF = RESET; // 8 bit
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r.B.SSM = SET;
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r.B.SSI = SET;
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r.B.LSBFIRST = RESET;
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r.B.BR = FPCLK_64; // 4.5 MHz
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r.B.LSBFIRST = SET;
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r.B.BR = FPCLK_32; // 4.5 MHz
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return r.R;
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});
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SPI1.CTLR2.modify([](SPI1_Type::CTLR2_DEF & r) -> uint32_t {
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@ -106,6 +106,8 @@ bool SpiClass::send (const char * data, const unsigned int len) {
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complete = false;
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total = len > SPIBUFLEN ? SPIBUFLEN : len;
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memcpy (buffer, data, total);
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DMA1.PADDR3.R = reinterpret_cast<size_t> (& SPI1.DATAR);
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DMA1.MADDR3.R = reinterpret_cast<size_t> (buffer);
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DMA1.CNTR3.R = total;
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DMA1.CFGR3.B.EN = SET;
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SPI1.CTLR1.B.SPE = SET;
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22
V203/usb/ch32v203/spisim.cpp
Normal file
22
V203/usb/ch32v203/spisim.cpp
Normal file
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@ -0,0 +1,22 @@
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#include "spisim.h"
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#include "system.h"
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SpiSim::SpiSim() noexcept : nss(GPIOA,4), sck(GPIOA,5), mosi(GPIOA,7) {
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delay_init();
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nss << true;
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sck << false;
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mosi << false;
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}
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void SpiSim::outbyte(const uint8_t b) const {
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nss << false;
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for (unsigned n=0u; n<8; n++) {
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const bool bit = (b & (1u << n)) ? true : false;
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mosi << bit;
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delay_us (2);
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sck << true;
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delay_us (4);
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sck << false;
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delay_us (2);
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}
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nss << true;
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}
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17
V203/usb/ch32v203/spisim.h
Normal file
17
V203/usb/ch32v203/spisim.h
Normal file
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@ -0,0 +1,17 @@
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#ifndef SPISIM_H
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#define SPISIM_H
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#include "gpio.h"
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/** Původní třída SpiClass s DMA a hardware SPI se chová divně
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* a je zbytečně složitá. Zde je potřeba odeslat 1 Byte na obvod
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* 74595 a je jednodušší to udělat softwarově. Výstup je sice
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* blokující, ale ten byte je dost krátká doba, aby to nerušilo.
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*/
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class SpiSim {
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GpioClass nss, sck, mosi;
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public:
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explicit SpiSim () noexcept;
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void outbyte (const uint8_t b) const;
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};
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#endif // SPISIM_H
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@ -17,7 +17,7 @@ DEL = rm -f
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# zdrojaky
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OBJS = main.o hack.o
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OBJS += usb_desc.o cdc_class.o spiclass.o adcscope.o samplering.o
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OBJS += usb_desc.o cdc_class.o spisim.o adcscope.o samplering.o
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include $(TARGET)/$(TOOL).mk
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BOBJS = $(addprefix $(BLD),$(OBJS))
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@ -76,11 +76,11 @@ void SampleRing::CommandPass(const unsigned int cmd) {
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switch (dest) {
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case DEST_CHA:
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voltage.a = header.bits.cmd_value;
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spi.send (voltage.common, 1);
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spi.outbyte (voltage.common[0]);
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break;
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case DEST_CHB:
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voltage.b = header.bits.cmd_value;
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spi.send (voltage.common, 1);
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spi.outbyte (voltage.common[0]);
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break;
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case DEST_BASE:
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m_time_base_order = header.bits.cmd_value;
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@ -3,7 +3,7 @@
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#include <stdint.h>
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#include "structures.h"
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#include "baselayer.h"
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#include "spiclass.h"
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#include "spisim.h"
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static constexpr unsigned RING_BIT = 10;
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static constexpr unsigned RING_LEN = 1u << RING_BIT;
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@ -19,7 +19,7 @@ enum RCVD_STATUS {
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};
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class SampleRing : public BaseLayer {
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SpiClass spi;
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SpiSim spi;
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ChannelVoltage voltage;
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[[gnu::aligned(4)]]DATA_BLOCK ring_buffer [RING_LEN];
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TrigerSettings m_settings;
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@ -38,7 +38,7 @@ class SampleRing : public BaseLayer {
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explicit SampleRing () noexcept : BaseLayer(), spi(), voltage(), m_settings(), m_head(0), m_tail(0), m_lenght(0),
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m_old_triger(false), m_trigered(false), m_finished(false),
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m_mode (TIME_BASE_TRIGERED), o_mode (TIME_BASE_TRIGERED), m_time_base_order(6u),
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rcvd_counter(0u), rcvd_status (RCVD_IDLE) { spi.Init(); };
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rcvd_counter(0u), rcvd_status (RCVD_IDLE) { };
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uint32_t Up (const char * data, const uint32_t len) override;
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void write (DATA_BLOCK const * data);
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void pass ();
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