add sinus generator
This commit is contained in:
Kizarm
parent
e7f6d52a86
commit
910bec6b6c
9 changed files with 88 additions and 171 deletions
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@ -18,7 +18,7 @@ CFLAGS+= -I. -I./$(TARGET) -I/usr/include/newlib
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DEL = rm -f
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# zdrojaky
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OBJS = main.o pwmclass.o
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OBJS = main.o pwmclass.o generator.o sin.o
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include $(TARGET)/$(TOOL).mk
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BOBJS = $(addprefix $(BLD),$(OBJS))
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@ -45,9 +45,11 @@ $(BLD)%.o: %.cpp
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@$(CXX) -std=c++17 -fno-rtti -c $(CFLAGS) $< -o $@
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$(BLD):
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mkdir $(BLD)
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sin.c: sin.py
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./sin.py
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flash: $(PRJ).elf
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minichlink -w $(PRJ).bin flash -b
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# vycisti
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clean:
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$(DEL) $(BLD)* *.lst *.bin *.elf *.map *~
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$(DEL) $(BLD)* *.lst *.bin *.elf *.map sin.c *~
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.PHONY: all clean
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150
pwm/dma_gpio.c
150
pwm/dma_gpio.c
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@ -1,150 +0,0 @@
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// DMA GPIO Output Example - this example shows
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// how you can output 8 pins all simultaneously
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// with a planned bit pattern at 4MSamples/s.
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//
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// It outputs a pattern of repeating 010101 and
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// 00000 alternating "frames".
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//
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// The interrupt fires once at the beginning and
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// once at the end.
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//
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#include "ch32v003fun.h"
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#include <stdio.h>
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volatile uint32_t count;
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#define MBSAMPS 1024
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uint8_t memory_buffer[1024];
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void DMA1_Channel2_IRQHandler( void ) __attribute__((interrupt)) __attribute__((section(".srodata")));
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void DMA1_Channel2_IRQHandler( void )
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{
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int i;
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static int frameno;
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volatile int intfr = DMA1->INTFR;
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do
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{
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DMA1->INTFCR = DMA1_IT_GL2;
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// Gets called at the end-of-a frame.
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if( intfr & DMA1_IT_TC2 )
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{
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uint32_t fv = (frameno&1)?0:0xaa55aa55;
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uint32_t * mbb = (uint32_t*)( memory_buffer + MBSAMPS/2 );
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for( i = 0; i < MBSAMPS/8; i++ )
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{
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mbb[i] = fv; // Fill in the frame data
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}
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frameno++;
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}
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// Gets called halfway through the frame
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if( intfr & DMA1_IT_HT2 )
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{
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uint32_t fv = (frameno&1)?0:0xaa55aa55;
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uint32_t * mbb = (uint32_t*)( memory_buffer );
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for( i = 0; i < MBSAMPS/8; i++ )
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{
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mbb[i] = fv; // Fill in the frame data.
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}
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}
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intfr = DMA1->INTFR;
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} while( intfr );
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}
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int main()
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{
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int i;
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SystemInit();
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// Reset all the peripherals we care about.
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RCC->APB2PRSTR = 0xffffffff;
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RCC->APB2PRSTR = 0;
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// Enable DMA
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RCC->AHBPCENR = RCC_AHBPeriph_SRAM | RCC_AHBPeriph_DMA1;
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// Enable GPIO and Timer 1
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RCC->APB2PCENR = RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOC | RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA;
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// GPIO D0/D4 Push-Pull (LED)
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GPIOD->CFGLR =
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*1) | // PD1 = SWIO (so we don't go off-bus)
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*0) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP_AF)<<(4*2) | // PD2 = T1CH1
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*4);
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// GPIO C All output.
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GPIOC->CFGLR =
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*0) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*1) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*2) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*3) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*4) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*5) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*6) |
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(GPIO_Speed_10MHz | GPIO_CNF_OUT_PP)<<(4*7);
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// Fill in the plan of what we will be sending out.
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for( i = 0; i < sizeof(memory_buffer) / sizeof(memory_buffer[0]); i++ )
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{
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memory_buffer[i] = (i&1)?0xaa:0x55;
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}
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// DMA2 can be configured to attach to T1CH1
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// The system can only DMA out at ~2.2MSPS. 2MHz is stable.
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DMA1_Channel2->CNTR = sizeof(memory_buffer) / sizeof(memory_buffer[0]);
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DMA1_Channel2->MADDR = (uint32_t)memory_buffer;
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DMA1_Channel2->PADDR = (uint32_t)&GPIOC->OUTDR;
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DMA1_Channel2->CFGR =
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DMA_CFGR1_DIR | // MEM2PERIPHERAL
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DMA_CFGR1_PL | // High priority.
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0 | // 8-bit memory
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0 | // 8-bit peripheral
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DMA_CFGR1_MINC | // Increase memory.
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DMA_CFGR1_CIRC | // Circular mode.
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DMA_CFGR1_HTIE | // Half-trigger
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DMA_CFGR1_TCIE | // Whole-trigger
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DMA_CFGR1_EN; // Enable
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NVIC_EnableIRQ( DMA1_Channel2_IRQn );
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DMA1_Channel2->CFGR |= DMA_CFGR1_EN;
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// NOTE: You can also hook up DMA1 Channel 3 to T1C2,
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// if you want to output to multiple IO ports at
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// at the same time. Just be aware you have to offset
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// the time they read at by at least 1/8Mth of a second.
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// Setup Timer1.
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RCC->APB2PRSTR = RCC_APB2Periph_TIM1; // Reset Timer
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RCC->APB2PRSTR = 0;
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// Timer 1 setup.
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TIM1->PSC = 0x0000; // Prescaler
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TIM1->ATRLR = 11; // Auto Reload - sets period (48MHz / (11+1) = 4MHz)
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TIM1->SWEVGR = TIM_UG | TIM_TG; // Reload immediately + Trigger DMA
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TIM1->CCER = TIM_CC1E | TIM_CC1P; // Enable CH1 output, positive pol
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TIM1->CHCTLR1 = TIM_OC1M_2 | TIM_OC1M_1; // CH1 Mode is output, PWM1 (CC1S = 00, OC1M = 110)
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TIM1->CH1CVR = 6; // Set the Capture Compare Register value to 50% initially
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TIM1->BDTR = TIM_MOE; // Enable TIM1 outputs
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TIM1->CTLR1 = TIM_CEN; // Enable TIM1
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TIM1->DMAINTENR = TIM_UDE | TIM_CC1DE; // Trigger DMA on TC match 1 (DMA Ch2) and TC match 2 (DMA Ch3)
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// Just debug stuff.
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printf( "Setup OK\n" );
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while(1)
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{
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GPIOD->BSHR = 1 | (1<<4); // Turn on GPIOs
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printf( "%lu\n", GPIOD->OUTDR );
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Delay_Ms( 250 );
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GPIOD->BSHR = (1<<16) | (1<<(16+4)); // Turn off GPIODs
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printf( "%lu\n", GPIOD->OUTDR );
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Delay_Ms( 250 );
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printf( "Step\n" );
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}
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}
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13
pwm/generator.cpp
Normal file
13
pwm/generator.cpp
Normal file
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@ -0,0 +1,13 @@
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#include "generator.h"
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extern "C" const uint16_t sin_tab[0x100];
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uint16_t Generator::step() {
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const uint16_t v = sin_tab [base >> 24];
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base += freq;
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return v;
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}
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unsigned int Generator::Send(uint16_t * const ptr, const unsigned int len) {
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for (unsigned n=0u; n<len; n++) ptr [n] = step();
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return len;
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}
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14
pwm/generator.h
Normal file
14
pwm/generator.h
Normal file
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@ -0,0 +1,14 @@
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#ifndef GENERATOR_H
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#define GENERATOR_H
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#include "oneway.h"
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/* Něco jako DDS, přesná frekvence není řešena (závisí na TIM1). */
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class Generator : public OneWay {
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unsigned base, freq;
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public:
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explicit Generator (const unsigned f) noexcept : OneWay(), base(0u), freq (f) {};
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unsigned Send (uint16_t * const ptr, const unsigned len) override;
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protected:
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uint16_t step ();
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};
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#endif // GENERATOR_H
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@ -1,7 +1,16 @@
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#include "pwmclass.h"
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#include "generator.h"
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//////////////////////////////////////
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/* Demonstrace PWM s použitím DMA
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* Generátor je sinus, data se tvoří
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* v přerušení. Parametry se musí nastavit
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* ve zdrojácích, je to jen DEMO.
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* */
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//////////////////////////////////////
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static PwmClass pwm;
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static Generator gen (1u << 16);
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int main () {
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pwm.attach(gen);
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for (;;);
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return 0;
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}
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@ -1,7 +1,7 @@
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#ifndef ONEWAY_H
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#define ONEWAY_H
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#include <stdint.h>
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/* C++ interface (jako callback v C) */
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class OneWay {
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public:
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virtual unsigned Send (uint16_t * const ptr, const unsigned len) = 0;
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@ -1,22 +1,23 @@
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#include "system.h"
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#include "pwmclass.h"
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#include "gpio.h"
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static PwmClass * pInstance = nullptr;
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extern "C" void DMA1_Channel2_IRQHandler( void ) __attribute__((interrupt));
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void DMA1_Channel2_IRQHandler( void ) {
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extern "C" void DMA1_Channel5_IRQHandler( void ) __attribute__((interrupt));
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void DMA1_Channel5_IRQHandler( void ) {
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DMA1_Type::INTFR_DEF state (DMA1.INTFR);
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DMA1.INTFCR.R = state.R; // clear all
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if (!pInstance) return;
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if (state.B.HTIF2) pInstance->send(false);
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if (state.B.TCIF2) pInstance->send(true);
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if (state.B.HTIF5 != RESET) pInstance->send(false);
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else if (state.B.TCIF5 != RESET) pInstance->send(true);
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}
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/*
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* initialize TIM1 for PWM
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*/
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static inline void t1pwm_init () noexcept {
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// Enable GPIOC, GPIOD and TIM1
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static inline void tim1pwm_init () noexcept {
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// Enable GPIOD and TIM1
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RCC.APB2PCENR.modify([] (RCC_Type::APB2PCENR_DEF & r) -> auto {
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r.B.IOPCEN = SET;
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r.B.IOPDEN = SET;
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r.B.TIM1EN = SET;
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return r.R;
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@ -35,12 +36,12 @@ static inline void t1pwm_init () noexcept {
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// CTLR1: default is up, events generated, edge align
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// SMCFGR: default clk input is CK_INT
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// Prescaler
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TIM1.PSC.R = 24000u;
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TIM1.PSC.R = 0u;
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// Auto Reload - sets period
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TIM1.ATRLR.R = 255u;
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TIM1.ATRLR.R = MAXPWM - 1;
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TIM1.CCER.modify([](TIM1_Type::CCER_DEF & r) -> auto {
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// Enable CH1N output, positive pol
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// Enable CH1N, CH1 output, positive pol
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r.B.CC1NE = SET;
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r.B.CC1E = SET;
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/*
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@ -67,6 +68,7 @@ static inline void t1pwm_init () noexcept {
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// Enable TIM1
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TIM1.CTLR1.B.CEN = SET;
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}
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typedef __SIZE_TYPE__ size_t;
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static void dma1ch5_init (void * ptr) {
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// Enable DMA
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RCC.AHBPCENR.modify([](RCC_Type::AHBPCENR_DEF & r) -> auto {
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@ -77,8 +79,8 @@ static void dma1ch5_init (void * ptr) {
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// DMA5 can be configured to attach to T1UP
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// The system can only DMA out at ~2.2MSPS. 2MHz is stable.
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DMA1.CNTR5.R = FULL_LEN;
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DMA1.MADDR5.R = reinterpret_cast<uint32_t>(ptr);
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DMA1.PADDR5.R = reinterpret_cast<uint32_t>(& TIM1.CH1CVR);
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DMA1.MADDR5.R = reinterpret_cast<size_t>(ptr);
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DMA1.PADDR5.R = reinterpret_cast<size_t>(& TIM1.CH1CVR);
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DMA1.CFGR5.modify([](DMA1_Type::CFGR5_DEF & r) -> auto {
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r.B.DIR = SET; // MEM2PERIPHERAL
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r.B.PL = 2u; // High priority.
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@ -95,8 +97,7 @@ static void dma1ch5_init (void * ptr) {
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}
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PwmClass::PwmClass() noexcept : pL(buffer), pH(buffer + HALF_LEN), src(nullptr) {
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for (unsigned n=0; n<FULL_LEN; n+=1) buffer [n] = n << 1;
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pInstance = this;
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t1pwm_init ();
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dma1ch5_init(buffer);
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tim1pwm_init ();
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dma1ch5_init (buffer);
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}
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@ -2,8 +2,9 @@
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#define PWMCLASS_H
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#include "oneway.h"
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static constexpr unsigned HALF_LEN = 64u;
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static constexpr unsigned FULL_LEN = 2 * HALF_LEN;
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static constexpr unsigned FULL_LEN = 2u * HALF_LEN;
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static constexpr unsigned MAXPWM = 2048u;
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/* Používá TIM1, PWM kanál 1, DMA1 kanál 5, přerušení DMA1_Channel5_IRQHandler */
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class PwmClass {
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uint16_t * const pL;
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uint16_t * const pH;
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27
pwm/sin.py
Executable file
27
pwm/sin.py
Executable file
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@ -0,0 +1,27 @@
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#!/usr/bin/python
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# -*- coding: utf-8 -*-
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import math
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header = '''/* Generated file */
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#include <stdint.h>
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const uint16_t sin_tab[] = {{{0:s}
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}};
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'''
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def generate():
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s = ''
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for n in range(0,256):
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if (n % 16) == 0:
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s += '\n '
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a = float(n) * math.pi / 128.0
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v = int (round (1024.0 * (1.0 + math.sin (a))));
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s += '{0:+6d},'.format(v)
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return s
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if __name__ == '__main__':
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s = generate()
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f = open ('sin.c','w')
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f.write(header.format(s))
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f.close()
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