spi add tx dma
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Kizarm
parent
64aeaf99ed
commit
4ac7016ea1
3 changed files with 55 additions and 46 deletions
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@ -15,52 +15,72 @@ enum SPICLK : uint32_t {
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static SpiClass * pSpiInstance = nullptr;
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extern "C" {
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[[gnu::interrupt]] extern void SPI1_IRQHandler ();
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//[[gnu::interrupt]] extern void DMA1_Channel2_IRQHandler();
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[[gnu::interrupt]] extern void DMA1_Channel3_IRQHandler();
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extern void * memcpy (void * dest, const void * src, size_t n);
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};
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void SPI1_IRQHandler () {
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if (pSpiInstance) pSpiInstance->irq();
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void DMA1_Channel3_IRQHandler() { // transmit channel
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if (pSpiInstance) pSpiInstance->drq();
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}
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static constexpr unsigned FM = 1u; // 10 MHz
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static void InitPins () noexcept {
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// PA4 - NSS (software), PA5 - SCK, PA6 - MISO, PA7 - MOSI
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// PA4 - NSS, PA5 - SCK, PA6 - MISO, PA7 - MOSI
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GPIOA.CFGLR.modify([](GPIOA_Type::CFGLR_DEF & r) -> uint32_t {
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r.B.MODE4 = 3u; // 50 MHz
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r.B.CNF4 = 0u; // gen push - pull
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r.B.MODE5 = 3u; // 50 MHz
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r.B.CNF5 = 3u; // alt push - pull
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r.B.MODE4 = FM;
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r.B.CNF4 = 2u; // alt push - pull
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r.B.MODE5 = FM;
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r.B.CNF5 = 2u; // alt push - pull
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r.B.MODE6 = 0u; // input mode
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r.B.CNF6 = 1u; // floating
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r.B.MODE7 = 3u; // 50 MHz
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r.B.CNF7 = 3u; // alt push - pull
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r.B.MODE7 = FM;
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r.B.CNF7 = 2u; // alt push - pull
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return r.R;
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});
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// AFIO - default
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}
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void SpiClass::irq() {
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if (SPI1.STATR.B.RXNE) {
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buffer [index++] = SPI1.DATAR.R;
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if (index == total) {
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void SpiClass::drq() {
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DMA1_Type::INTFR_DEF state (DMA1.INTFR);
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if (state.B.TCIF3) {
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DMA1.INTFCR.B.CTCIF3 = SET; // clear
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complete = true;
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index = 0u;
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select (true);
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return;
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}
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// tady by mělo být už odesláno
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SPI1.DATAR.R = buffer [index];
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DMA1.CFGR3.B.EN = RESET;
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SPI1.CTLR1.B.SPE = RESET;
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}
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}
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SpiClass::SpiClass() noexcept : index(0u), total(0u), complete (false) {
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SpiClass::SpiClass() noexcept : total(0u), complete (true) {
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pSpiInstance = this;
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}
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void SpiClass::Init() {
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RCC.APB2PCENR.modify([](RCC_Type::APB2PCENR_DEF & r) -> uint32_t {
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r.B.SPI1EN = SET;
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r.B.IOPAEN = SET;
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r.B.AFIOEN = SET;
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return r.R;
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});
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RCC.AHBPCENR.B.DMA1EN = SET;
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InitPins();
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select (true);
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// Configure the peripheral data register address
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DMA1.PADDR3.R = reinterpret_cast<size_t> (& SPI1.DATAR);
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// Configure the memory address
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DMA1.MADDR3.R = reinterpret_cast<size_t> (buffer);
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// Configure the number of DMA tranfer to be performs on DMA channel 1
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// DMA1.CNTR3 .R = FULL_LEN;
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// Configure increment, size, interrupts and circular mode
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DMA1.CFGR3.modify([] (DMA1_Type::CFGR3_DEF & r) -> uint32_t {
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r.B.PL = 3u; // highest priority
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r.B.DIR = SET; // memory -> periferal
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r.B.MINC = SET; // memory increment
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r.B.MSIZE = 0u; // 8-bit
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r.B.PSIZE = 0u; // 8-bit
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//r.B.HTIE = SET; // INT Enable HALF
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r.B.TCIE = SET; // INT Enable FULL
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r.B.CIRC = RESET; // ! Circular MODE
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//Enable DMA Channel 1
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//r.B.EN = SET;
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return r.R;
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});
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SPI1.CTLR1.modify([](SPI1_Type::CTLR1_DEF & r) -> uint32_t {
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r.B.CPHA = SET;
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r.B.CPOL = SET;
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@ -74,31 +94,21 @@ SpiClass::SpiClass() noexcept : index(0u), total(0u), complete (false) {
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});
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SPI1.CTLR2.modify([](SPI1_Type::CTLR2_DEF & r) -> uint32_t {
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r.B.SSOE = SET;
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r.B.RXNEIE = SET;
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//r.B.RXNEIE = SET;
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//r.B.TXEIE = SET;
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r.B.TXDMAEN = SET;
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return r.R;
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});
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NVIC.EnableIRQ(SPI1_IRQn);
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SPI1.CTLR1.B.SPE = SET;
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NVIC.EnableIRQ(DMA1_Channel3_IRQn);
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}
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void SpiClass::select (const bool set) const noexcept {
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if (set) GPIOA.BSHR.B.BS4 = SET;
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else GPIOA.BSHR.B.BR4 = SET;
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}
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bool SpiClass::send (const char * data, const unsigned int len) {
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if (!complete) return false;
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select (false);
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complete = false;
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index = 0u;
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total = len > SPIBUFLEN ? SPIBUFLEN : len;
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memcpy (buffer, data, total);
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SPI1.DATAR.R = buffer [index];
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DMA1.CNTR3.R = total;
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DMA1.CFGR3.B.EN = SET;
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SPI1.CTLR1.B.SPE = SET;
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return true;
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}
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char * SpiClass::received (unsigned int & count) {
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if (complete) count = total;
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else count = 0;
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return buffer;
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}
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@ -1,21 +1,20 @@
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#ifndef SPICLASS_H
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#define SPICLASS_H
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/**
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*/
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static constexpr unsigned SPIBUFLEN = 8u;
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class SpiClass {
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volatile unsigned index;
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unsigned total;
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volatile bool complete;
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char buffer [SPIBUFLEN];
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public:
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explicit SpiClass () noexcept;
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void irq ();
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void select (const bool set) const noexcept;
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void Init ();
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void drq ();
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bool send (const char * data, const unsigned len);
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char * received (unsigned & count);
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protected:
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// void select (const bool set) const noexcept;
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};
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#endif // SPICLASS_H
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@ -38,7 +38,7 @@ class SampleRing : public BaseLayer {
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explicit SampleRing () noexcept : BaseLayer(), spi(), voltage(), m_settings(), m_head(0), m_tail(0), m_lenght(0),
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m_old_triger(false), m_trigered(false), m_finished(false),
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m_mode (TIME_BASE_TRIGERED), o_mode (TIME_BASE_TRIGERED), m_time_base_order(6u),
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rcvd_counter(0u), rcvd_status (RCVD_IDLE) {};
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rcvd_counter(0u), rcvd_status (RCVD_IDLE) { spi.Init(); };
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uint32_t Up (const char * data, const uint32_t len) override;
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void write (DATA_BLOCK const * data);
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void pass ();
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