RISC-V/V203F6P6/gsm/spiblocked.cpp

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2025-01-30 19:27:19 +01:00
#include "system.h"
#include "spiblocked.h"
enum SPICLK : uint32_t {
FPCLK_2 = 0u, // 72 MHz
FPCLK_4, // 36 MHz
FPCLK_8, // 18 MHz
FPCLK_16, // 9 MHz
FPCLK_32, // 4.5 MHz
FPCLK_64, // 2.25 MHz
FPCLK_128, // 1.125 MHz
FPCLK_256, // 0.5625 MHz
};
static constexpr unsigned FM = 3u; // 50 MHz
static void InitPins () noexcept {
// PA4 - NSS, PA5 - SCK, PA6 - MISO, PA7 - MOSI
GPIOA.CFGLR.modify([](GPIOA_Type::CFGLR_DEF & r) -> uint32_t {
r.B.MODE4 = FM;
r.B.CNF4 = 0u; // gen push - pull
r.B.MODE5 = FM;
r.B.CNF5 = 2u; // alt push - pull
r.B.MODE6 = 0u; // input mode
r.B.CNF6 = 1u; // floating
r.B.MODE7 = FM;
r.B.CNF7 = 2u; // alt push - pull
return r.R;
});
// AFIO - default
GPIOA.BSHR.B.BS4 = SET;
}
SpiBlocked::SpiBlocked() noexcept {
RCC.APB2PCENR.modify([](RCC_Type::APB2PCENR_DEF & r) -> uint32_t {
r.B.SPI1EN = SET;
r.B.IOPAEN = SET;
//r.B.AFIOEN = SET;
return r.R;
});
InitPins();
RCC.APB2PRSTR.B.SPI1RST = SET;
RCC.APB2PRSTR.B.SPI1RST = RESET;
SPI1.CTLR1.modify([](SPI1_Type::CTLR1_DEF & r) -> uint32_t {
r.B.CPHA = RESET;
r.B.CPOL = RESET;
r.B.MSTR = SET; // master
r.B.DFF = RESET; // 8 bit
r.B.SSM = SET; // software
r.B.SSI = SET; // !!! netuším proč, ale jinak se nenastaví MSTR a SPE
r.B.LSBFIRST = RESET;
r.B.BR = FPCLK_64;
return r.R;
});
SPI1.CRCR.R = 7u;
SPI1.CTLR1.B.SPE = SET;
}
uint8_t SpiBlocked::ReadWriteByte(const uint8_t data) {
while (SPI1.STATR.B.TXE == RESET);
SPI1.DATAR.B.DATAR = data;
while (SPI1.STATR.B.RXNE == RESET);
return SPI1.DATAR.B.DATAR;
}
void SpiBlocked::ChipSelect(const bool on) {
if (on) GPIOA.BSHR.B.BR4 = SET;
else GPIOA.BSHR.B.BS4 = SET;
}